Mingu Kang
Associate Professor
Designs VLSI circuits and in-memory computing architectures for machine learning and signal processing.
Mingu Kang's lab at UCSD works on accelerators, chips & architecture, signal processing & information theory and speech enhancement & signal processing. 32 papers since 2023. 12 PhD students and 1 master's student. 19 alumni. Applications close .
At a glance
- papers, 2023–2026
- 8/ year
- at T1 venues
- 0%
- PhD students
- 12
- MS students
- 1
- alumni listed
- 19
Papers by yearfrom the lab homepage, 2023–2026
- 7 papers2026 · T1 0 · collecting
- 13 papers2025 · T1 0
- 8 papers2024 · T1 0
- 4 papers2023 · T1 0
T1 venuesOther
Research focuspaper titles that use each topic's words
- Signal processing & information theory9 papers
- Speech enhancement & signal processing8 papers
- Accelerators, chips & architecture1 paper
- computing architectures0 papers
- vlsi0 papers
Paper list
From the lab homepage.
20267 papers
- IEEE Custom Integrated Circuits Conference (CICC), Apr.A 4D Radar Accelerator with Adaptive Sparse Processing for Real-Time Object Detection
- IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), to appearCross-Domain Acceleration of Open Modification Search: From Commodity Platforms to Emerging Memory and Storage Devices
- International Symposium on Microarchitecture (MICRO), Oct.D-NOVA: In-Storage Retrieval Accelerator via Dual-Bound 3D NAND-Optimized Similarity Search with Vector Adaptation
- IEEE Journal of Solid State Circuits (JSSC)FSL-HDnn: A 40 nm Few-shot On-Device Learning Accelerator with Integrated Feature Extraction and Hyperdimensional Computing
- Great Lakes Symposium on VLSI (GLSVLSI), JuneNOVA-PIM: Noise-Aware Hyperdimensional Processing in Memory with Optimized Vector Allocation and Minimal ADCs
- IEEE European Solid-State Electronics Research Conference (ESSERC), SeptReCIM-HD: a 40 nm On-Device Learning Accelerator with Hyperdimensional Computing via Importance-Based Hybrid Digital–ReRAM CIM
- International Conference on Machine Learning (ICML), July. , Spotlight paper as top 2.2%, Jul.STAR-KV: Low-Rank KV Cache Compression via Soft Thresholding for Adaptive Rank Control
202513 papers
- European Solid-State Electronics Research Conference (ESSERC) (former ESSCIRC), Sep.6.0 TOPS/W Reconfigurable AI-based Channel State Information Compression using Delta Encoding in Multi-Receiver Mobile Systems
- IEEE International Symposium on VLSI (VLSIC), Jun.Clo-HDnn: A 4.66 TFLOPS/W and 3.78 TOPS/W Continual On-Device Learning Accelerator with Energy-efficient Hyperdimensional Computing via Progressive Search
- Hot Chips, Aug.Clo-HDnn: Continual On-Device Learning Accelerator with Hyperdimensional Computing via Progressive Search
- IEEE Journal of Solid State Circuits (JSSC), , early access availableDmNE: A Dual-mode Neural Engine for Multiplicative and Multiplication-free Kernels with Fine-grained Precision Scaling and Processing Element-wise Power Gating
- IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), to appearEnd-to-end Acceleration of Generative Models with Runtime Regularized KV Cache Management
- IEEE Journal of Solid State Circuits (JSSC)Energy-efficient Reconfigurable XGBoost Inference Accelerator with Modular Unit Trees via Selective Node Execution and Data Movement
- IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Jan. . Chosen for "popular" paper and invited to "The Best of TVLSI” Distinguished Lecture Series [Link]Exploiting Chiplet Integration Technology for Fast High-Capacity DRAM Modules
- International Conference on Computer-Aided Design (ICCAD), Oct.FeNOMS: Enhancing Open Modification Spectral Library Search with In-Storage Processing of Ferroelectric NAND (FeNAND) Flash
- Design Automation Conference (DAC), June.High-throughput Point-Cloud Accelerator with Sparsity-aware Hierarchical Neighbor Voxel Search and Skipping
- IEEE Journal of Solid State Circuits (JSSC)HyAtt: A Hybrid Attention Accelerator for Transformers with Analog In-memory Computing
- International Symposium on Computer Architecture (ISCA), Jun.Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution
- ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), Aug.SmartMS: Efficient Hierarchical Database Search for Mass Spectrometry via Processing-in-Memory
20248 papers
- IEEE Custom Integrated Circuits Conference (CICC), Apr.52.5 TOPS/W 1.7GHz Reconfigurable XGBoost Inference Accelerator based on Modular-Unit-Tree with Dynamic Data and Compute Gating
- European Solid-State Electronics Research Conference (ESSERC) (former ESSCIRC), Sep.An Analog and Digital Hybrid Attention Accelerator for Transformers with Charge-based In-memory Computing
- ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), Aug.Efficient Transformer Accelerator via Reconfiguration for Encoder and Decoder Dual Modes with Sparsity-Aware Data Mapping
- European Solid-State Electronics Research Conference (ESSERC) (former ESSCIRC), Sep.FSL-HDnn: A 5.7 TOPS/W End-to-end Few-shot Learning Classifier Accelerator with Feature Extraction and Hyperdimensional Computing
- Design Automation Conference (DAC), June.LEAF: An Adaptation Framework against Noisy Data on Edge through Ultra Low-Cost Training
- International Conference on Electronics, Information, and Communication (ICEIC), Feb.Mixed-Signal Dot-Product Processor With Switched-Capacitors for Machine Learning
- IEEE International Symposium on High-Performance Computer Architecture (HPCA), Mar.SPADE: Sparse Pillar-based 3D Object Detection Accelerator for Autonomous Driving
- IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (JXCDC), Nov.SpecPCM: A Low-power PCM-based In-Memory Computing Accelerator for Full-stack Mass Spectrometry Analysis
20234 papers
- IEEE Symposium on VLSI Technology and Circuits (VLSI symposium), June.A Switched-Capacitor Integer Compute Unit with Decoupled Storage and Arithmetic for Cloud AI Inference in 5nm CMOS
- IEEE Custom Integrated Circuits Conference (CICC), Apr.AI Processor with Sparsity-adaptive Real-time Dynamic Frequency Modulation for Convolutional Neural Networks and Transformers
- IEEE Journal of Solid State Circuits (JSSC), [Invited], Nov.FreFlex: A high-performance Processor for Convolution and Attention Computations via Sparsity-adaptive Dynamic Frequency Boosting
- IEEE Transactions on Circuits and Systems II (TCAS II), Nov.Split WL 6T SRAM-based Bit Serial Computing-in-Memory Macro with High Signal Margin and High Throughput
Where alumni went19 listed
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