Jian Huang
Associate Professor
Studies computer systems and AI infrastructure, including memory and storage systems for machine learning workloads.
Jian Huang's lab at UIUC works on distributed, cloud & edge systems. 25 papers since 2023, 22 at top venues, mostly MICRO and ASPLOS. 12 PhD students and 5 master's students. 7 alumni. Applications close .
At a glance
- papers, 2023–2026
- 7/ year
- at T1 venues
- 88%
- PhD students
- 12
- MS students
- 5
- alumni listed
- 7
Papers by yearfrom the lab homepage, 2023–2026
- 5 papers2026 · T1 5 · collecting
- 9 papers2025 · T1 9
- 4 papers2024 · T1 3
- 7 papers2023 · T1 5
T1 venuesOtherVenues: MICRO, ASPLOS, SOSP, ISCA, NeurIPS
Research focuspaper titles that use each topic's words
- Distributed, cloud & edge systems6 papers
- storage5 papers
- storage systems0 papers
- computer systems0 papers
- workloads0 papers
Paper list
From the lab homepage.
20265 papers
- MICRO (T1)Auto-Scaling Heterogeneous Neural Processing Units for Energy and Cost-Efficient LLM Serving
- MICRO (T1)Enabling Spatially Fine-Grained DVFS in Neural Processing Units for Energy-Efficient LLM Serving
- MICRO (T1)Exploring the Efficiency of 3D-Stacked AI Chip Architecture for LLM Inference with Tsim
- VLDB (T1)RAGPerf: An End-to-End Benchmarking Framework for Retrieval-Augmented Generation Systems
- ICML (T1)Vegas: Self-Speculative Decoding with Verification-Guided Sparse Attention
20259 papers
- ASPLOS (T1)ByteFS: System Support for (CXL-based) Memory-Semantic Solid-State Drives
- ASPLOS (T1)Coach: Exploiting Temporal Patterns for All-Resource Oversubscription in Cloud Platforms
- NeurIPS (T1)Cost-Efficient LLM Training with Lifetime-Aware Tensor Offloading via GPUDirect Storage
- MICRO (T1)ELK: Exploring the Efficiency of Inter-core Connected AI Chips with Deep Learning Compiler Techniques
- ASPLOS (T1)FleetIO: Managing Multi-Tenant Cloud Storage with Multi-Agent Reinforcement Learning
- SOSP (T1)Managing Scalable Direct Storage Accesses for GPUs with GoFS
- MICRO (T1)ReGate: Enabling Power Gating in Neural Processing Units
- HPCA (T1)SkyByte: Architecting an Efficient Memory-Semantic CXL-based SSD with OS and Hardware Co-design
- NeurIPS (T1)Toward Engineering AGI: Benchmarking the Engineering Design Capabilities of LLMs
20244 papers
- SoCCExploring the Efficiency of Renewable Energy-based Modular Data Centers at Scale
- ISCA (T1)HADES: Hardware-Assisted Distributed Transactions in the Age of Fast Networks and SmartNICs
- MICRO (T1)Hardware-Assisted Virtualization of Neural Processing Units for Cloud Platforms
- SOSP (T1)Scaling Deep Learning Computation over the Inter-Core Connected Intelligence Processor with T10
20237 papers
- MICRO (T1)G10: Enabling An Efficient Unified GPU Memory and Storage Architecture with Smart Tensor Migrations
- ASPLOS (T1)LeaFTL: A Learning-Based Flash Translation Layer for Solid-State Drives
- MICRO (T1)Learning to Drive Software-Defined Solid-State Drives
- SOSP (T1)RackBlox: A Software-Defined Rack-Scale Storage System with Network-Storage Co-Design
- HotOSSystem Virtualization for Neural Processing Units
- TOSThe Security War in File Systems: An Empirical Study from A Vulnerability-Centric Perspective
- ISCA (T1)V10: Hardware-Assisted NPU Multi-tenancy for Improved Resource Utilization and Fairness
Where alumni went7 listed
Apply to UIUCFall 2027
UIUC Siebel Computer Science PhD
- Round
- Single round
- Opens
- —
- GRE
- optional
- English
- TOEFL iBT / IELTS
- Fee
- USD 90
Not yet confirmed for this intake.
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Data
Checked against the lab homepage.
- Collected
- Verified
- Papers
- The lab homepage
- Members
- Lab homepage
- Alumni
- Lab homepage
Tiers are venue classifications, not lab rankings.
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