Xiaohang Wang
教授
Works on modeling and optimization of AI computing chips and systems and on security of AI compute infrastructure.
Xiaohang Wang's lab at Zhejiang works on accelerators, chips & architecture, distributed, cloud & edge systems and learning theory & optimization. 22 papers since 2023, 4 at top venues, mostly DAC and ASPLOS. Applications close .
At a glance
- papers, 2023–2026
- 6/ year
- at T1 venues
- 18%
- PhD students
- —
- MS students
- —
- alumni listed
- —
Papers by yearfrom DBLP, 2023–2026
- 7 papers2026 · T1 0 · collecting
- 9 papers2025 · T1 4
- 3 papers2024 · T1 0
- 3 papers2023 · T1 0
T1 venuesOtherVenues: DAC, ASPLOS, MICRO
Research focuspaper titles that use each topic's words
- Distributed, cloud & edge systems7 papers
- Learning theory & optimization3 papers
- Accelerators, chips & architecture1 paper
- compute0 papers
- computing chips0 papers
Paper list
From DBLP.
20267 papers
- ISCASAdaptive Federated Learning Defense Against Byzantine Attacks and Concept Drift in IIoT (opens in a new tab)
- IWQoSCANListener: A Lightweight and Adaptive Intrusion Detection System for In-vehicle CAN Bus (opens in a new tab)
- J. Syst. Archit.EF-IDS: An efficient intrusion detection system with enriched features for CAN bus in modern vehicles (opens in a new tab)
- IEEE Trans. ComputersFBRE: Fuzzing Based Bit-Level Reverse Engineering of Vehicular CAN Bus (opens in a new tab)
- COINSH2-GAT: Hierarchical Heterogeneous Graph Attention Networks for AI Model Safety Verification (opens in a new tab)
- IEEE Commun. Surv. TutorialsIntrusion Detection and Prevention for Intra- and Inter-Vehicle Networks: A Comprehensive Survey (opens in a new tab)
- Integr.Online detection of hardware Trojan enabled packet tampering attack on network-on-chip: A Bayesian approach (opens in a new tab)
20259 papers
- ASPLOS (T1)BatchZK: A Fully Pipelined GPU-Accelerated System for Batch Generation of Zero-Knowledge Proofs (opens in a new tab)
- J. Syst. Archit.Detection and defence against thermal and timing covert channel attacks in multicore systems (opens in a new tab)
- MICRO (T1)LEGOSim: A Unified Parallel Simulation Framework for Multi-chiplet Heterogeneous Integration (opens in a new tab)
- J. Syst. Archit.LUFT-CAN: A lightweight unsupervised learning based intrusion detection system with frequency-time analysis for vehicular CAN bus (opens in a new tab)
- DAC (T1)On Bit-level Reverse Engineering of Vehicular CAN Bus (opens in a new tab)
- DAC (T1)On Design Space Exploration of Cache System in Multi-Chiplet Systems (opens in a new tab)
- ACM Trans. Embed. Comput. Syst.On Improving the Performance of Intra- and Inter-chiplet Interconnection Networks in Multi-chiplet Systems for Accelerating FHE Encrypted Neural Network Applications (opens in a new tab)
- IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.On Optimizing Inter- and Intra-Chiplet Interconnection Topologies for Robust Multi-Chiplet Systems (opens in a new tab)
- IEEE Trans. ComputersOn Task Mapping in Multi-chiplet Based Many-Core Systems to Optimize Inter- and Intra-chiplet Communications (opens in a new tab)
20243 papers
- IEEE Trans. ComputersComponent Dependencies Based Network-on-Chip Test (opens in a new tab)
- Comput. Electr. Eng.Introduction to the special section on electronic technology for intelligent world (opens in a new tab)
- CODES+ISSSSpecial Session: Emerging Architecture Design, Control, and Security Challenges in Software Defined Vehicles (opens in a new tab)
20233 papers
- ISCASAdaptive Caching Policies for Chiplet Systems Based on Reinforcement Learning (opens in a new tab)
- IEEE Trans. ComputersDetection of Thermal Covert Channel Attacks Based on Classification of Components of the Thermal Signal Features (opens in a new tab)
- IEEE Trans. ComputersModeling and Analysis of Thermal Covert Channel Attacks in Many-core Systems (opens in a new tab)
Where alumni went
Alumni are not listed on the lab homepage.
Apply to ZhejiangFall 2027
Computer Science PhD (international applicants)
- Round
- Self-funded
- Opens
- —
- GRE
- See program page
- English
- Per ZJU language requirements
- Fee
- RMB 800
Not yet confirmed for this intake.
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Data
Some numbers could not be verified:
- The member list could not be found on the lab site.
- The alumni list could not be found on the lab site.
- The lab site and the paper record do not agree.
- Collected
- Verified
- Papers
- DBLP
- Members
- Not collected
- Alumni
- Not collected
Tiers are venue classifications, not lab rankings.
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