Mahsa Shoaran
Associate Professor
Leads the Integrated Neurotechnologies Laboratory, designing circuits and on-chip machine learning for diagnostic and therapeutic neural interfaces.
Mahsa Shoaran's lab at EPFL works on accelerators, chips & architecture, neuroscience & brain-computer interfaces and interfaces & interaction techniques. 49 papers since 2023, 3 at top venues, mostly ICML and Nature. 19 PhD students. 14 alumni, most often to Apple. Applications close .
At a glance
- papers, 2023–2026
- 13/ year
- at T1 venues
- 6%
- PhD students
- 19
- MS students
- 0
- alumni listed
- 14
Papers by yearfrom the lab homepage, 2023–2026
- 16 papers2026 · T1 0 · collecting
- 16 papers2025 · T1 2
- 11 papers2024 · T1 1
- 6 papers2023 · T1 0
T1 venuesOtherVenues: ICML, Nature, NeurIPS
Research focuspaper titles that use each topic's words
- Neuroscience & brain-computer interfaces18 papers
- Interfaces & interaction techniques10 papers
- on-chip2 papers
- Accelerators, chips & architecture0 papers
- therapeutic0 papers
Paper list
From the lab homepage.
202616 papers
- IEEE Transactions on Circuits and Systems I: Regular PapersA 0.0251 mm2Temperature Sensor Achieving a ±0.25 °C (3σ) Inaccuracy From –40 °C to 125 °C Without Backend Nonlinearity Correction (opens in a new tab)
- IEEE/JSAP Symposium on VLSI Technology and CircuitsA 0.0257 mm 2, 1.16 µW, Mask-Efficient KWS SoC with Hybrid Cap-ROM-IMC/SRAM-NMC and Transfer Learning for Flexible Multi-Keyword Recognition (opens in a new tab)
- CICCA 0.08mm2, 2Vpp-Input-Range, 95dB-SNDR, 178.5dB-FOMs Noise-Shaping SAR ADC for Closed-Loop Neural Interfaces (opens in a new tab)
- IEEE Solid-State Circuits LettersA 10.2V 8-Channel Neural Stimulator With Nearly Constant Efficiency Across 90% Current Range and a TDM ADC-Based One-Shot Charge Balancing With 6mV Residue (opens in a new tab)
- IEEE/JSAP Symposium on VLSI Technology and CircuitsA 50-mm2 Crystal-Free Bidirectional WPDT System with Carrier-Reuse Clocking for Implantable Neural Interfaces (opens in a new tab)
- IEEE/JSAP Symposium on VLSI Technology and CircuitsA 64-Channel, Low-Power End-to-End Transformer-Based BCI SoC for Efficient Motion Intention Decoding (opens in a new tab)
- ISCASA Discrete-Time Analog Compute Macro for Edge ML with 200 TOPS/W in CMOS 28nm (opens in a new tab)
- IEEE Solid-State Circuits LettersA High-Efficiency Magnetoelectric Power Link with a Load-Adaptive CMOS Rectifier for Miniaturized Implants (opens in a new tab)
- Journal of Neural EngineeringA medium-density EMG system for real-time proportional and simultaneous neuroprosthetic hand control using lightweight neural networks (opens in a new tab)
- IEEE Journal of Solid-State CircuitsLogSync: A Low-Power Logarithmic SoC for Cross-Regional Synchrony Extraction and Adaptive Psychiatric State Classification (opens in a new tab)
- —Neural Prostheses for Communication Restoration: Algorithmic, Systemic, and Clinical Perspectives (opens in a new tab)
- European Conference on Antennas and PropagationOptimal Frequency of Shallow-Implanted Antennas for Brain–Machine Interfaces (opens in a new tab)
202516 papers
- IEEE Journal of Solid-State CircuitsA 3-mm 2 , Multi-Data-Rate, Low-Power IR-UWB Transmitter With On-Chip Antenna for Distributed, Free-Floating Neural Implants (opens in a new tab)
- IEEE Symposium on VLSI Technology and Circuits: “Cultivating the VLSI Garden: From Seeds of Innovation to Thriving Growth“A 32-Channel 196-μW Logarithmic SoC for Brain Network Connectivity Extraction and Adaptive Psychiatric Symptom Classification
- IEEE Journal of Solid-State CircuitsA 49.8-mm 2 IR-UWB Transmitter With Co-Designed Power Amplifier and Antenna for Neural Implants With Extended Transmission Range (opens in a new tab)
- IEEE Journal of Solid-State CircuitsA 5.2 μ W, 2-to-8-Channel Scalable, Speaker-Tracking Microphone Array Featuring a CNN-Defined Analog Front-End (opens in a new tab)
- IEEE Symposium on VLSI Technology and Circuits: “Cultivating the VLSI Garden: From Seeds of Innovation to Thriving Growth“A 5.2μ W, 2-to-8-Channel Scalable, Speaker-Tracking Microphone Array Featuring a CNN-Defined AFE (opens in a new tab)
- IEEE Asian Solid-State Circuits ConferenceA Magnetoelectric Wireless Power Transfer System with a 97.25%-Efficient Load-Adaptive CMOS Rectifier for Miniaturized Implants (opens in a new tab)
- NERBind: A Bimanual Neural Discriminator-Decoder for Accurate Two-Hand Trajectory Prediction in Brain-Computer Interfaces (opens in a new tab)
- EMBCDeep Neural Encoder-Decoder Model to Relate fMRI Brain Activity with Naturalistic Stimuli (opens in a new tab)
- IEEE Transactions on Instrumentation and MeasurementDeep Transfer Learning Based on Weighted Feature Alignment and Its Application to Industrial Quality Prediction (opens in a new tab)
- Nature (T1)Dynamic range and precision of hybrid vision sensors (opens in a new tab)
- IEEE Interregional NEWCAS ConferenceIntegrating Neural Interfaces with Machine Learning: Enabling Self-Sufficient and Ubiquitous Prosthetic and Diagnostic Devices (opens in a new tab)
- NeurIPS (T1)Linear Attention for Efficient Bidirectional Sequence Modeling
202411 papers
- ISSCC33.3 MiBMI: A 192/512-Channel 2.46mm² Miniaturized Brain-Machine Interface Chipset Enabling 31-Class Brain-to-Text Conversion Through Distinctive Neural Codes (opens in a new tab)
- IEEE Journal of Solid-State CircuitsA 2.46-mm2 Miniaturized Brain-Machine Interface (MiBMI) Enabling 31-Class Brain-to-Text Decoding (opens in a new tab)
- IEEE European Solid-State Electronics Research ConferenceA 3 mm2, Energy-Efficient, Multi-Data-Rate, FDMA Transmitter with On-Chip Antenna for Next-Generation Neural Implants (opens in a new tab)
- CICCA 49.8mm2 Fully Integrated, 1.5m Transmission-Range, High-Data-Rate IR-UWB Transmitter for Brain Implants (opens in a new tab)
- IEEE International Conference on AI Circuits and SystemsA Hardware-Efficient EMG Decoder with an Attractor-based Neural Network for Next-Generation Hand Prostheses (opens in a new tab)
- ICECSA Systematic Design Flow for Compact and Efficient Analog Front-Ends in Closed-Loop Neuromodulation Systems (opens in a new tab)
- Nature Biomedical EngineeringAn application-based taxonomy for brain–computer interfaces (opens in a new tab)
- IEEE Custom Integrated Circuits ConferenceIntelligent Neural Interfaces: An Emerging Era in Neurotechnology (opens in a new tab)
- —Method for Synthetic Generation of LFP Data for Testing of Feature Extraction Algorithms
- Journal of Neural EngineeringNeural decoding and feature selection methods for closed-loop control of avoidance behavior (opens in a new tab)
- ICML (T1)REST: Efficient and Accelerated EEG Seizure Analysis through Residual State Updates
20236 papers
- —A 0.21-ps FOM Capacitor-Less Analog LDO with Dual-Range Load Current for Biomedical Applications
- Ieee Solid-State Circuits LettersA 16-Channel Low-Power Neural Connectivity Extraction and Phase-Locked Deep Brain Stimulation SoC (opens in a new tab)
- —Enhancing Epileptic Seizure Detection with EEG Feature Embeddings
- EpilepsiaFrom basic sciences and engineering to epileptology: A translational approach (opens in a new tab)
- —Next-Generation Closed-Loop Neural Interfaces: Circuit and AI-driven innovations
- ICML’23: International Conference on Machine LearningXTab: Cross-table Pretraining for Tabular Transformers (opens in a new tab)
Where alumni went14 listed, 50% to industry
Industry 1Academia 1
Most often to
- Apple
Also to
- EPFL
Apply to EPFLFall 2027
EDIC Computer and Communication Sciences PhD
- Round
- Round 1
- Opens
- —
- GRE
- optional
- English
- TOEFL 100 / IELTS 7.0
- Fee
- none
Confirmed on the program page.
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