Luca Benini
Full Professor
Designs energy-efficient hardware for machine learning, including the open-source PULP RISC-V platform, quantized neural network accelerators and edge AI systems.
Luca Benini's lab at ETH Zurich works on accelerators, chips & architecture and efficient training & inference. 278 papers since 2023, 26 at top venues, mostly DAC and NeurIPS.
At a glance
- papers, 2023–2026
- 73/ year
- at T1 venues
- 9%
- PhD students
- —
- MS students
- —
- alumni listed
- —
Papers by yearfrom DBLP, 2023–2026
- 29 papers2026 · T1 2 · collecting
- 95 papers2025 · T1 11
- 69 papers2024 · T1 2
- 85 papers2023 · T1 11
T1 venuesOtherVenues: DAC, NeurIPS, ICML, ICRA, IJCNN
Research focuspaper titles that use each topic's words
- risc-v64 papers
- Efficient training & inference61 papers
- Accelerators, chips & architecture21 papers
- energy-efficient hardware0 papers
- network accelerators0 papers
Paper list
From DBLP.
202629 papers
- CFA 8.4 TFLOPS@16b/4.3W General-Purpose Programmable Accelerated Cluster for AI-Native RAN (opens in a new tab)
- CICCA Low-Power 1.2 TFLOPS/W Merge-Split RVV Processor for Mixed Scalar-Vector Workloads (opens in a new tab)
- IEEE Trans. Biomed. Circuits Syst.BioGAP-Ultra: A Modular Edge-AI Platform for Wearable Multimodal Biosignal Acquisition and Processing (opens in a new tab)
- ASAPDesign in Tiles: Automating GEMM Deployment on Tile-Based Many-PE Accelerators (opens in a new tab)
- IEEE Trans. Circuits Syst. I Regul. Pap.EAGLE: A Flexible Heterogeneous Analog Compute-In-Memory Architecture With RISC-V Programmable Multi-Core Accelerators (opens in a new tab)
- COINSedgeGuard: Multimodal On-Device Perception for First Responders in Emergency Scenarios (opens in a new tab)
- IEEE Internet Things J.Efficient On-Device Domain Learning for Keyword Spotting on Ultra-Low-Power Platforms (opens in a new tab)
- Future Gener. Comput. Syst.Elevating Datacenter Resilience with ThermADNet: A Thermal Anomaly Detection System (opens in a new tab)
- ICPREnabling 8B Bitwise Autoregressive Image Generation on Edge GPUs (opens in a new tab)
- ACM Trans. Comput. Heal.End-to-end Automated Deep Neural Network Optimization for PPG-based Blood Pressure Estimation on Wearables (opens in a new tab)
- CFEPAC: The Last Dance: Invited Paper (opens in a new tab)
- IEEE Trans. Biomed. Eng.FEMBA on the Edge: Physiologically-Aware Pre-Training, Quantization, and Deployment of a Bidirectional Mamba EEG Foundation Model on an Ultra-Low Power Microcontroller (opens in a new tab)
202595 papers
- IEEE Trans. Very Large Scale Integr. Syst.A 66-Gb/s/5.5-W RISC-V Many-Core Cluster for 5G+ Software-Defined Radio Uplinks (opens in a new tab)
- GLOBECOMA Compute&Memory Efficient Model-Driven Neural 5G Receiver for Edge AI-assisted RAN (opens in a new tab)
- ASAPA Dynamic Allocation Scheme for Adaptive Shared-Memory Mapping on Kilo-Core RV Clusters for Attention-Based Model Deployment (opens in a new tab)
- IEEE J. Emerg. Sel. Topics Circuits Syst.A Flexible Template for Edge Generative AI With High-Accuracy Accelerated Softmax and GELU (opens in a new tab)
- CGOA Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions (opens in a new tab)
- COINSA Multi-Modal IoT Node for Energy-Efficient Environmental Monitoring with Edge AI Processing (opens in a new tab)
- AICASA Multicast-Capable AXI Crossbar for Many-core Machine Learning Accelerators (opens in a new tab)
- IEEE Trans. Circuits Syst. II Express BriefsA Reliable, Time-Predictable Heterogeneous SoC for AI-Enhanced Mixed-Criticality Edge Applications (opens in a new tab)
- SASA Small Flying IoT Node for Real-Time Spectral Monitoring in Smart Agriculture (opens in a new tab)
- ACM Comput. Surv.A Survey on Deep Learning Hardware Accelerators for Heterogeneous HPC Platforms (opens in a new tab)
- IEEE Trans. Biomed. Circuits Syst.A Tiny Transformer for Low-Power Arrhythmia Classification on Microcontrollers (opens in a new tab)
- IEEE Trans. Biomed. Circuits Syst.A Wearable Ultra-Low-Power System for EEG-Based Speech-Imagery Interfaces (opens in a new tab)
202469 papers
- DATE12 mJ Per Class On-Device Online Few-Shot Class-Incremental Learning (opens in a new tab)
- ISCAS3D Partitioning with Pipeline Optimization for Low-Latency Memory Access in Many-Core SoCs (opens in a new tab)
- CFA Gigabit, DMA-enhanced Open-Source Ethernet Controller for Mixed-Criticality Systems (opens in a new tab)
- IEEE Trans. Circuits Syst. I Regul. Pap.A Heterogeneous RISC-V Based SoC for Secure Nano-UAV Navigation (opens in a new tab)
- IEEE Trans. ComputersA High-Performance, Energy-Efficient Modular DMA Engine Architecture (opens in a new tab)
- IEEE Trans. Instrum. Meas.A Muscle Pennation Angle Estimation Framework From Raw Ultrasound Data for Wearable Biomedical Instrumentation (opens in a new tab)
- ISCASA Precision-Optimized Fixed-Point Near-Memory Digital Processing Unit for Analog In-Memory Computing (opens in a new tab)
- IEEE AccessAn Extreme-Edge TCN-Based Low-Latency Collision-Avoidance Safety System for Industrial Machinery (opens in a new tab)
- IEEE Trans. ComputersAra2: Exploring Single- and Multi-Core Vector Processing With an Efficient RVV 1.0 Compliant Open-Source Processor (opens in a new tab)
- DATEAXI-REALM: A Lightweight and Modular Interconnect Extension for Traffic Regulation and Monitoring of Heterogeneous Real-Time SoCs (opens in a new tab)
- EMBCBISeizuRe: BERT-Inspired Seizure Data Representation to Improve Epilepsy Monitoring (opens in a new tab)
- IEEE Trans. Biomed. Circuits Syst.BrainFuseNet: Enhancing Wearable Seizure Detection Through EEG-PPG-Accelerometer Sensor Fusion and Efficient Edge Deployment (opens in a new tab)
202385 papers
- Future Gener. Comput. Syst.7 μJ/inference end-to-end gesture recognition from dynamic vision sensor data using ternarized hybrid convolutional neural networks (opens in a new tab)
- ISSCCA 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing (opens in a new tab)
- ISVLSIA 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks (opens in a new tab)
- IWASIA Fast and Accurate Optical Flow Camera for Resource-Constrained Edge Applications (opens in a new tab)
- Nat. Mac. Intell.A neuro-vector-symbolic architecture for solving Raven's progressive matrices (opens in a new tab)
- IROS (T1)A Relative Infrastructure-less Localization Algorithm for Decentralized and Autonomous Swarm Formation (opens in a new tab)
- IEEE AccessA Self-Sustainable and Micro-Second Time Synchronized Multi-Node Wireless System for Aerodynamic Monitoring on Wind Turbines (opens in a new tab)
- BioCASAn Adaptive Dynamic Mixing Model for sEMG Real-Time ICA on an Ultra-Low Power Processor (opens in a new tab)
- DATEAn Ultra-Low-Power Serial Implementation for Sigmoid and Tanh Using CORDIC Algorithm (opens in a new tab)
- MICRO (T1)AutoCC: Automatic Discovery of Covert Channels in Time-Shared Hardware (opens in a new tab)
- DATEAXI-Pack: Near-Memory Bus Packing for Bandwidth-Efficient Irregular Workloads (opens in a new tab)
- DATEBio-inspired Autonomous Exploration Policies with CNN-based Object Detection on Nano-drones (opens in a new tab)
Where alumni went
Alumni are not listed on the lab homepage.
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Computer Science Doctorate (D-INFK)
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- Rolling (no deadline)
- Opens
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- GRE
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- English
- Proficiency in written and spoken English
- Fee
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Confirmed on the program page.
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