Liqiang Lu
教师
Designs FPGA and hardware accelerators for neural networks and develops compilation methods for quantum computing.
Liqiang Lu's lab at Zhejiang works on accelerators, chips & architecture and quantum computing. 38 papers since 2023, 24 at top venues, mostly DAC and HPCA. Applications close .
At a glance
- papers, 2023–2026
- 10/ year
- at T1 venues
- 63%
- PhD students
- —
- MS students
- —
- alumni listed
- —
Papers by yearfrom DBLP, 2023–2026
- 7 papers2026 · T1 5 · collecting
- 20 papers2025 · T1 12
- 4 papers2024 · T1 3
- 7 papers2023 · T1 4
T1 venuesOtherVenues: DAC, HPCA, MICRO, ISCA, ASPLOS
Research focuspaper titles that use each topic's words
- Quantum computing23 papers
- Accelerators, chips & architecture2 papers
- fpga1 paper
- compilation1 paper
- hardware accelerators0 papers
Paper list
From DBLP.
20267 papers
- J. Comput. Sci. Technol.A Review of Quantum Computing Systems and Software (opens in a new tab)
- PACMPL (T1)A Tale of 1001 LoC: Potential Runtime Error-Guided Specification Synthesis for Verifying Large-Scale Programs (opens in a new tab)
- HPCA (T1)CLINE: Improving Control Flow Compilation of Quantum Programs with Control Line Encoding (opens in a new tab)
- IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.HeteroQNN: Enabling Distributed QNN Under Heterogeneous Quantum Devices (opens in a new tab)
- HPCA (T1)ORANGE: Exploring Ockham's Razor for Neural Rendering by Accelerating 3DGS on NPUs with GEMM-Friendly Blending and Balanced Workloads (opens in a new tab)
- ISCA (T1)STEP: Adaptive Spatio-Temporal Expert Prefetching for Low-Latency and Memory-Efficient MoE Inference (opens in a new tab)
- HPCA (T1)TENET-v2: Applying Relation-Centric Notation to Model and Optimize Data Swizzle in the Cache of Modern NPU (opens in a new tab)
202520 papers
- IEEE Trans. ComputersAdaptDQC: Adaptive Distributed Quantum Computing With Quantitative Performance Analysis (opens in a new tab)
- DAC (T1)ArbiterQ: Improving QNN Convergency and Accuracy by Applying Personalized Model on Heterogeneous Quantum Devices (opens in a new tab)
- ISCA (T1)ARTERY: Fast Quantum Feedback using Branch Prediction (opens in a new tab)
- HPCA (T1)Choco-Q: Commute Hamiltonian-based QAOA for Constrained Binary Optimization (opens in a new tab)
- APPTDyQNet: Optimizing Dynamic Entanglement Routing with Online Request in Quantum Network (opens in a new tab)
- DAC (T1)DyREM: Dynamically Mitigating Quantum Readout Error with Embedded Accelerator (opens in a new tab)
- DATEEmpowering Quantum Error Traceability with MoE for Automatic Calibration (opens in a new tab)
- IJCAI (T1)Horae: A Domain-Agnostic Language for Automated Service Regulation (opens in a new tab)
- Proc. ACM Softw. Eng.HornBro: Homotopy-Like Method for Automated Quantum Program Repair (opens in a new tab)
- DAC (T1)PISA: Efficient Precision-Slice Framework for LLMs with Adaptive Numerical Type (opens in a new tab)
- APPTQRAMsim: Efficiently Simulating, Analyzing, and Optimizing Large-Scale Quantum Random Access Memory (opens in a new tab)
- ISCA (T1)Qtenon: Towards Low-Latency Architecture Integration for Accelerating Hybrid Quantum-Classical Computing (opens in a new tab)
20244 papers
- ASPLOS (T1)MorphQPV: Exploiting Isomorphism in Quantum Programs to Facilitate Confident Verification (opens in a new tab)
- ASPLOS (T1)QuFEM: Fast and Accurate Quantum Readout Calibration Using the Finite Element Method (opens in a new tab)
- IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.Rubick: A Unified Infrastructure for Analyzing, Exploring, and Implementing Spatial Architectures via Dataflow Decomposition (opens in a new tab)
- DAC (T1)SpREM: Exploiting Hamming Sparsity for Fast Quantum Readout Error Mitigation (opens in a new tab)
20237 papers
- IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.Automatic Generation of Spatial Accelerator for Tensor Algebra (opens in a new tab)
- FPLCalabash: Accelerating Attention Using a Systolic Array Chain on FPGAs (opens in a new tab)
- HPCA (T1)HyQSAT: A Hybrid Approach for 3-SAT Problems by Integrating Quantum Annealer with CDCL (opens in a new tab)
- ICCAD (T1)QPulseLib: Accelerating the Pulse Generation of Quantum Circuit with Reusable Patterns (opens in a new tab)
- MICRO (T1)QuCT: A Framework for Analyzing Quantum Circuit by Extracting Contextual and Topological Features (opens in a new tab)
- DAC (T1)Rubick: A Synthesis Framework for Spatial Architectures via Dataflow Decomposition (opens in a new tab)
- ICFPTSSiMD: Supporting Six Signed Multiplications in a DSP Block for Low-Precision CNN on FPGAs (opens in a new tab)
Where alumni went
Alumni are not listed on the lab homepage.
Apply to ZhejiangFall 2027
Computer Science PhD (international applicants)
- Round
- Self-funded
- Opens
- —
- GRE
- See program page
- English
- Per ZJU language requirements
- Fee
- RMB 800
Not yet confirmed for this intake.
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Data
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