Zhuoran Song
Associate Professor
Works on computer architecture, AI processor chip design and GPU microarchitecture.
Zhuoran Song's lab at SJTU works on accelerators, chips & architecture. 47 papers since 2023, 21 at top venues, mostly DAC and MICRO. Applications close .
At a glance
- papers, 2023–2026
- 12/ year
- at T1 venues
- 45%
- PhD students
- —
- MS students
- —
- alumni listed
- —
Papers by yearfrom the lab homepage, 2023–2026
- 12 papers2026 · T1 9 · collecting
- 14 papers2025 · T1 6
- 14 papers2024 · T1 6
- 7 papers2023 · T1 0
T1 venuesOtherVenues: DAC, MICRO, ISCA, HPCA
Research focuspaper titles that use each topic's words
- Accelerators, chips & architecture5 papers
- gpu2 papers
- processor0 papers
- chip design0 papers
- chip0 papers
Paper list
From the lab homepage.
202612 papers
- ACM Conference on Architectural Support for Programming Languages and Operating SystemsAGS: Accelerating 3D Gaussian Splatting SLAM via CODEC-Assisted Frame Covisibility Detection
- ISCA (T1)AQuant: Repurposing CODEC for VLM Acceleration via Adaptive Quantization
- ACM Conference on Architectural Support for Programming Languages and Operating SystemsASDR: Exploiting Adaptive Sampling and Data Reuse for CIM-based Instant Neural Rendering
- MICRO (T1)DeGS: A Scalable 3DGS Architecture via Decoupled Workload Parsing and Reorganization
- DAC (T1)Excavating Consistency Across Editing Steps for Effective Multi-Step Image Editing
- MICRO (T1)FLUTE: A LUT-Based Floating-Point Engine for Efficient LLM Acceleration Exploiting Core-Tail Hierarchical Alignment
- DAC (T1)FUSE-TCAD: A Diffusion-Based Multi-Field Surrogate for High-Fidelity TCAD Device Simulation
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsImportance-Aware Dynamic Compression for Efficient Diffusion Models Inference
- ISCA (T1)Optimizing 3D Gaussian Splatting with Axis-Shared Rasterization and Order-independent Transmittance
- MICRO (T1)SpecVLA: Enabling Efficient Robotic Manipulation via Speculative VLA Inference and Verification
- HPCA (T1)Towards Compute-Aware In-Switch Computing for LLMs Tensor-Parallelism on Multi-GPU Systems
- MICRO (T1)VQVLA: Motion-Aware Vector Quantization with Computation Fusion for VLA Acceleration
202514 papers
- ISCA (T1)Cambricon-SR: An Accelerator for Neural Scene Representation with Sparse Encoding Table
- MICRO (T1)GCC: A 3DGS Inference Architecture with Gaussian-Wise and Cross-Stage Conditional Processing
- ACM Transactions on Architecture and Code OptimizationGCNTrain+: A Versatile and Efficient Accelerator for Graph Convolutional Neural Network Training
- IEEE International Parallel & Distributed Processing SymposiumGIFTS: Efficient GCN Inference Framework on PyTorch-CPU via Exploring the Sparsity
- IEEE International Symposium on High-Performance Computer ArchitectureGSArch: Breaking Memory Barriers in 3D Guassian Splatting Training via Architectural Support
- MICRO (T1)HEAT: NPU-NDP HEterogeneous Architecture for Transformer-Empowered Graph Neural Networks
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsHyCTor: A Hybrid CNN-Transformer Network Accelerator With Flexible Weight/Output Stationary Dataflow and Multi-Core Extension
- European Conference on Parallel ProcessingLight-DiT: An Importance-Aware Dynamic Compression Framework for Diffusion Transformers
- DAC (T1)MHDiff: Memory- and Hardware-Efficient Diffusion Acceleration via Focal Pixel Aware Quantization
- IEEE Transactions on ComputersRTSA: A Run-Through Sparse Attention Framework for Video Transformer
- DAC (T1)SAGA: A Memory-Efficient Accelerator for GANN Construction via Harnessing Vertex Similarity
- DAC (T1)SynGPU: Synergizing CUDA and Bit-Serial Tensor Cores for Vision Transformer Acceleration on GPU
202414 papers
- ACM Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS , CCF-A, Accept rate=14%). [paper] [cite]CMC: Video Transformer Acceleration via CODEC Assisted Matrix Condensing
- ACM Transactions on Architecture and Code Optimization (TACO , CCF-A). [paper] [cite]Environmental Condition Aware Super-Resolution Acceleration Framework in Server-Client Hierarchies
- DAC (T1)EOS: An Energy-Oriented Attack Framework for Spiking Neural Networks
- Design, Automation, and Test in Europe (DATE , CCF-B). Best Paper Award. [paper] [cite]FusionArch: A Fusion-Based Accelerator for Point-Based Point Cloud Neural Networks
- DAC (T1)INSPIRE: Accelerating Deep Neural Networks via Hardware-friendly Index-Pair Encoding
- DAC (T1)InterArch: Video Transformer Acceleration via Inter-Feature Deduplication with Cube-based Dataflow
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD , CCF-A). [paper] [cite]Janus: A Flexible Processing-in-Memory Graph Accelerator Towards Sparsity
- DAC (T1)MoC: A Morton-Code-Based Fine-Grained Quantization for Accelerating Point Cloud Neural Networks
- Design, Automation, and Test in Europe (DATE , CCF-B). [paper] [cite]Sava: A Spatial- and Value-Aware Accelerator for Point Cloud Transformers
- High Performance Computer Architecture (HPCA , CCF-A). [paper] [cite]SPARK: Scalable and Precision-Aware Acceleration of Neural Networks via Efficient Encoding
- MICRO (T1)SRender: Boosting Neural Radiance Field Efficiency via Sensitivity-Aware Dynamic Precision Rendering
- DAC (T1)TSAcc: An Efficient Tempo-Spatial Similarity Aware Accelerator for Attention Acceleration
20237 papers
- IEEE Transactions on Parallel and Distributed Systems (TPDS , CCF-A). [paper] [cite]A Point Cloud Video Recognition Acceleration Framework Based on Tempo-Spatial Information
- Design Automation Conference (DAC , CCF-A). [paper] [cite]AdaS: A Fast and Energy-Efficient CNN Accelerator Exploiting Bit-Sparsity
- IEEE International Conference on Computer Design (ICCD , CCF-B). [paper] [cite]DEQ: Dynamic Element-wise Quantization for Efficient Attention Architecture
- IEEE International Conference on Computer Design (ICCD , CCF-B). [paper] [cite]HyAcc: A Hybrid CAM-MAC RRAM-based Accelerator for Recommendation Model
- Design, Automation and Test in Europe Conference (DATE , CCF-B). Best Paper Award. [paper] [cite]PRADA: Point Cloud Recognition Acceleration via Dynamic Approximation
- IEEE International Conference on Computer Design (ICCD , CCF-B). [paper] [cite]RealArch: A Real-Time Scheduler for Mapping Multi-Tenant DNNs on Multi-Core Accelerators
- IEEE International Conference on Computer Design (ICCD , CCF-B). [paper] [cite]ViTframe: Vision Transformer Acceleration via Informative Frame Selection for Video Recognition
Where alumni went
Alumni are not listed on the lab homepage.
Apply to SJTUFall 2027
Computer Science PhD (international applicants)
- Round
- Self-funded
- Opens
- —
- GRE
- See program page
- English
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- Fee
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Not yet confirmed for this intake.
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